New Base I/O Products Expand Company's Portfolio of Highly Optimized IP
FREMONT, Calif., April 21 /PRNewswire-FirstCall/ --
Virage Logic (Nasdaq: VIRL), a leading provider of best-in-class semiconductor
IP platforms, today announced the availability of the first in a series of
silicon-proven technology-optimized semiconductor IP platforms. Virage Logic's
semiconductor IP platforms enable System-on-Chip (SoC) designers to meet the
increasingly competitive challenges inherent in all market segments as the gap
between technology capabilities and design productivity widens. The first
Virage Logic Technology-Optimized Platform is available on TSMC's 130-
nanometer (nm) process.
"With increased process and design complexity and shorter design cycles,
there is a need in the market for both pre-tested and ready-to-use components
that are interoperable and offer SoC designers a single-source for their IP
requirements," said Rich Wawrzyniak, senior analyst, Semico. "Virage Logic is
now in a position, with the addition of its new Base I/O library, to offer its
complete Technology-Optimized Platform that delivers cost, performance and
reliability benefits for the foundry and Integrated Device Manufacturer (IDM)
markets."
Technology-Optimized Semiconductor IP Platforms
Building on its technology and market leadership position as an embedded
memory provider, in October 2002, Virage Logic added logic libraries to its
portfolio of IP offerings. With today's announcement of the industry's most
comprehensive base I/O offering, Virage Logic delivers its first complete IP
platform. The platform aims to meet the critical requirements of reducing
costs and risks, while boosting performance and ensuring high manufacturing
yields for a particular foundry or IDM process. By providing silicon-proven,
integrated IP that is compatible with all the major EDA flows, Virage Logic
addresses the needs of complex and mainstream SoC designs.
In conjunction with the company's Self-Test and Repair (STAR) Memory
System(TM) and its Area, Speed and Power (ASAP) Logic(TM) and Memory product
lines, Virage Logic's Base I/O library provides SoC designers with a complete
IP platform to help expedite the creation of next generation products. It
addresses the increasingly complex task of identifying and obtaining the
semiconductor IP needed to produce a successful, on-time product. Through a
technology partnership with TriCN, an innovative I/O IP developer, Virage
Logic is able to deliver an I/O architecture that can be used for a wide range
of I/O functions.
"We are breaking down the barriers associated with achieving high
manufacturing yields while dramatically cutting silicon and system costs,"
said Adam Kablanian, CEO and president, Virage Logic. "By providing our
Technology-Optimized Platform that is based on our best-in-class memory,
logic, and I/O semiconductor IP, SoC designers now have a trusted single
source for silicon-proven and production-ready IP."
New Base I/O Product Line
I/O standards continue to evolve more rapidly than many other aspects of
SoC design, driven by the need to address system-level design challenges such
as performance increases, process temperature and voltage variations, and
flexibility in package types. By providing the industry's most complete base
I/O cell technology, Virage Logic offers designers more options for extended
I/O functionality.
The Virage Logic Base I/O cells, which include the SSTL-2 Class I and II,
HSTL Class I and II, PCI-X 1.0, PCI 2.2, 2.5V LVTTL and 3.3VLVTTL/CMOS, are
designed to accommodate future standards while delivering the capabilities
that are needed for today's chips. Built for both flip-chip and bondwire
implementations, the robust architecture has built-in noise isolation for
improved operation and reliability for high performance applications.
Wawrzyniak added that through its open architecture with a foundation for
advanced I/O ring along with a rich set of base I/O cells, Virage Logic's new
Base I/O library will go a long way in addressing system level design
challenges early.
Pricing and Availability
Virage Logic's Technology-Optimized Platform for TSMC's 130-nm logic
process is available now. Front-ends are available immediately with pricing
starting at $120,000 (U.S. list price). Additional Technology-Optimized
Platforms based on other foundries and processes will be introduced over the
next several months.
About Virage Logic
Virage Logic Corp. is a leading provider of best-in-class semiconductor IP
platforms based on memory, logic, I/Os, and IP development tools that are
silicon proven and production ready. Virage Logic meets market demands for
cost reduction, while improving performance and reliability for fabless and
integrated device manufacturer (IDM) companies focused on the consumer,
communications and networking, handheld and portable, and graphics markets.
Virage Logic is headquartered in Fremont, California and has sales and support
offices worldwide. For more information, visit http://www.viragelogic.com or call
877-360-6690 toll free or 510-360-8000.
SAFE HARBOR STATEMENT FOR VIRAGE LOGIC UNDER THE PRIVATE SECURITIES
LITIGATION REFORM ACT OF 1995:
Statements made in this news release other than statements of historical
fact are forward-looking statements, including, for example, statements
relating to Virage Logic's business outlook, new products and new
relationships. Forward-looking statements are subject to a number of known and
unknown risks and uncertainties, which might cause actual results to differ
materially from those expressed or implied by such statements. These risks and
uncertainties include Virage Logic's ability to maintain and develop new
relationships with third-party foundries, adoption of technologies by
semiconductor companies and increases in the demand for their products, the
company's ability to overcome the challenges associated with establishing
licensing relationships with semiconductor companies, the company's ability to
obtain royalty revenues from customers in addition to license fees, business
and economic conditions generally and in the semiconductor industry in
particular, competition in the market for embedded memories and other risks
including those described in the Company's Annual Report on Form 10-K for the
period ended September 30, 2002, filed with the Securities and Exchange
Commission (SEC) on December 16, 2002, and in Virage Logic's other periodic
reports filed with the SEC, all of which are available from Virage Logic or
from the SEC's website (http://www.sec.gov), and in press releases and other
communications. Virage Logic disclaims any intention or duty to update any
forward-looking statements made in this news release.
NOTE: All trademarks and copyrights are property of their respective
owners and are protected therein.
SOURCE Virage Logic Corp.
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Related links:
http://www.viragelogic.com
CONTACT:
Sabina Burns of Virage Logic,
+1-510-743-8115, or sabina.burns@viragelogic.com; or Jennifer
Bader of McClenahan Bruer Communications, +1-415-954-7128, or
jennifer@mcbru.com, for Virage Logic
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