Automated Solution Reduces Time, Risk Associates With Functional Verification
PALO ALTO, Calif., May 10 /PRNewswire/ -- Denali Software, Inc., today
introduced PureSuite(TM), a comprehensive verification suite that exercises
PCI Express designs and measures both compliance with the PCI Express
specification and interoperability with other PCI Express designs.
PureSuite, together with Denali's popular PureSpec verification IP
product, provides a completely automated solution for functional verification
of PCI Express designs. The PureSuite product enables designers to
dramatically reduce the time and risk associated with functional verification,
a task which regularly consumes over 70 percent of the entire chip development
cycle.
"Interface verification is a market Denali intends to own and dominate,"
says Sanjay Srivastava, chief executive officer (CEO) of Denali, the leading
provider of electronic design automation (EDA) products for chip interface
design and verification. "We achieved overwhelming market share with our
verification IP products for PCI Express and memory interfaces, and now we are
completing the solution with PureSuite. We will use this successful platform
to deliver verification solutions for other chip interfaces."
PureSuite contains a comprehensive suite of several thousand pre-built
tests for exercising specific PCI Express functionality and corner cases,
including all items defined in the Compliance Checklist document from the PCI
Special Interest Group (PCI-SIG). PureSuite leverages Denali's PureSpec
verification IP to automatically select and configure individual tests based
on the specific PCI Express device configuration for the design under test,
and other PCI Express devices in the system. The ability to generate and
execute thousands of specialized tests based on the specific PCI Express
devices in the system provides a dramatic reduction in risk and time to market
for the overall chip verification.
The Market
As system on chip (SoC) design complexity continues to grow, the
verification effort needed to validate the correct functionality of these
devices expands even more rapidly. The fact that functional verification
today consumes more than 70 percent of design cycle time represents a crisis
for the electronics industry. The verification problem only gets worse as
today's chip designs begin to incorporate more and more new interfaces,
including complex serial protocols like PCI Express and Serial ATA. Interface
verification is rapidly becoming the most significant bottleneck in SoC
design. Chip designers require specialized solutions to verify compliance
with complex protocol standards and interoperability with other devices in the
end product or system.
Introducing PureSuite
Denali's PureSuite covers the entire PCI Express specification written by
the PCI-SIG. With a suite of thousands of pre-defined tests, PureSuite is
able to fully measure specification coverage of PCI Express interface
verification designs against the PCI-SIG compliance checklist.
All aspects of the specification are tested and covered -- from physical
layer, data link, transaction layer and configuration space, to initialization
and power management -- with compliant traffic and non-compliant traffic to
measure error recovery capabilities.
Each individual test is designed to cover specific checklist items, and
each test includes a detailed description of purpose, assumptions, scenario,
expected result and corresponding PCI-SIG checklist item number. Tests can be
driven from the BFM within PureSpec across the PCI Express link toward the
design under test, or can be initiated from the application interface of the
design under test. PureSuite automatically maintains a cumulative report of
compliance results listing the pass/fail status for all tests executed with
the design.
Denali will exhibit at the 41st Design Automation Conference (DAC) in
Booth Number 1945 from Monday, June 7, through Wednesday, June 9, at the San
Diego Convention Center in San Diego, Calif.
Pricing and Availability
PureSuite, priced at $50,000 per year per project, is available now on all
platforms. For more information, contact Kevin Silver, Denali's vice
president of marketing. He can be reached at 650-461-7240, or via email at
kevin@denali.com.
About Denali
Denali Software Inc. is the world's leading provider of EDA tools and
Semiconductor Intellectual Property (SIP) solutions for chip interface design,
integration and verification. PureSpec is the industry leading solution for
verifying compliance and interoperability for PCI Express designs. Denali's
Databahn memory controller cores are licensed for use in over 80 chips and
provide designers with the highest quality solution for interfacing with all
new and emerging high-performance memory technologies. Denali's MMAV product
is the de facto industry standard for modeling and simulating memory during
all phases of design and verification. Memory selection, memory controller
configuration, and memory system performance analysis are supported through
Denali's online infrastructure at eMemory.com. More than 400 companies
worldwide use Denali's tools, technology, and services to design and verify
complex chip interfaces for communication, consumer, and computer products.
For more information, visit Denali at: http://www.denali.com . Or, contact
Denali directly at: 650-461-7200, or via email at info@denali.com.
At 41st Design Automation Conference (DAC) booth #1945.
NOTE: Denali, The Denali logo, Databahn, eMemory, MMAV, and PureSpec are
trademarks of Denali Software Inc. PCI Express is a trademark of PCI-SIG. All
other trademarks are the property of their respective owners.
For more information, contact:
Nanette Collins
Public Relations for Denali Software
617-437-1822
nanette@nvc.com
SOURCE Denali Software Inc.
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Related links:
http://www.denali.com
CONTACT:
Nanette Collins, Public Relations for Denali
Software, +1-617-437-1822, or nanette@nvc.com
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