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Soitec Unveils Industry's First Commercial Line of Strained SOI Substrates

    Ramps Production to Address Chipmakers' Sub-65-nm Development Needs

    SEMICON WEST, SAN FRANCISCO, July 11 /PRNewswire/ -- Soitec (Euronext
Paris), the world's leading supplier of silicon-on-insulator (SOI) wafers
and other engineered substrates, today announced that its strained SOI
(sSOI) wafers are now available for sub-65-nm processing -- marking the
industry's first commercial line of these future-ready substrates.
Combining the high mobility advantages of strained silicon with the proven
speed and power dissipation benefits of SOI, Soitec's new sSOI wafers are
designed to bring added performance and power advantages to
future-generation chips.
    "This newest line of SOI substrates targets advanced applications in
the network processing, computing, gaming and high-end wireless industries,
where speed and ultra-low power are critical issues," said Andre-Jacques
Auberton-Herve, president and CEO of Soitec. "In addition to enabling
chipmakers to further amplify the performance and power advantages of their
chips, our new sSOI wafers will serve as an extendible platform for the
future."
    According to Suresh Venkatesan, director of Austin Silicon Technology
Solutions at Freescale Semiconductor -- a leading innovator in sSOI
technology -- the need to control both active and standby power
consumption, while continuing to improve transistor performance, is driving
the industry to develop creative, non-traditional scaling techniques.
"Strained SOI technology is an excellent example of the types of innovation
Freescale is incorporating into their transistor roadmap. While this
technology is currently under evaluation for the 45-nm node -- initially
targeting networking and gaming applications -- it could eventually help
Freescale's customers create dramatically smaller and more powerful
entertainment electronics and intelligent portable devices," Venkatesan
said.
    The Road Ahead for sSOI
    Soitec reports that customer interest in its new line of sSOI
substrates stems primarily from market and technology leaders seeking to
dramatically increase electron mobility while reducing gate leakage and
power consumption. Additionally, sSOI helps overcome the scaling issues
associated with CMOS process-induced strain techniques and opens the door
to bandwidth gap tuning. Currently, Soitec offers sSOI products for both
partially and fully depleted device architectures. With its compatibility
with existing SOI and CMOS processes, proven capabilities for FinFETs or
Multigate FETs, notable mobility gains and future extendibility, sSOI is
poised to play an important role for devices beyond 65-nm.
    To meet customers' emerging sSOI requirements, Soitec has transferred
its 300-mm sSOI platform from development into the first phase of
production. This is consistent with the company's strategic plan to expand
production capacity in accordance with market needs. "Just as we did with
SOI, we will ramp our initial production to meet the needs of early
adopters followed by ramps to higher volumes as the mainstream market
increasingly turns to this innovative substrate technology. In the
meantime, we will focus on continuous quality improvements to meet our
customers' evolving technical requirements," Auberton-Herve concluded.
    SEMICON West 2006 Press Conference, featuring guest speaker from
Freescale Semiconductor: Soitec will be exhibiting in booth #5425 (North
Hall) at SEMICON West 2006, July 11-13 at the Moscone Convention Center in
San Francisco, Calif. Editors interested in learning more about the
company's latest sSOI technology developments are encouraged to attend a
press conference that will be held on Tuesday, July 11 from 4:00 p.m. -
6:00 p.m. at the Sheraton Palace Hotel (French Parlor Room). To attend,
RSVP to Kelly Picasso at kpicasso@mcapr.com or 650-968-8900, x127.
    About The Soitec Group:
    The Soitec Group is the world's leading innovator and provider of the
engineered substrates that serve as the foundation for today's most
advanced electronic products and nanotechnologies. Headquartered in Bernin,
France, the company manufactures its comprehensive portfolio of engineered
substrates, including silicon-on-insulator (SOI) and strained SOI (sSOI),
using Soitec's proprietary Smart Cut(TM) technology -- the de facto
industry standard. With its strong global presence, patented technology and
industry-leading production capacity, Soitec is helping to drive the
performance and power advantages that are key to the smaller, more power
efficient, and increasingly mobile electronic products favoured by
consumers worldwide. Both shares and convertible bonds are listed on
Euronext Paris. For more information, visit the company's website located
at http://www.soitec.com.
    NOTE: Soitec, Smart Cut and UNIBOND are trademarks of S.O.I.TEC Silicon
On Insulator Technologies.


SOURCE Soitec




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CONTACT:
Camille Darnaud-Dufour, Vice President,
Communications of Soitec, +33-6-79-49-51-43, or
camille.darnaud-dufour@soitec.com; or Kelly Picasso, Senior
Account Associate of MCA, +1-650-968-8900, ext. 127, or
kpicasso@mcapr.com, for Soitec